Bernoulli Distribution

Generates Bernoulli distributed random numbers.

Details

Bernoulli random number generator fills the \(n \times p\) numeric table with Bernoulli distributed values with the \(p\) probability of success on a single trial, where \(p \in R\), \(0 \leq p \leq 1\).

A variate is called Bernoulli distributed if after a trial it is equal to \(1\) with the probability of success \(p\) and to \(0\) with the probability \(1 - p\). The probability distribution is given by:

\[p\{x = 1\} = p\]
\[p\{x = 0\} = 1 - p\]

The cumulative distribution function is as follows:

\[\begin{split}F_p(x) = \begin{cases} 0, & x < 0 \\ 1 - p, & 0 \leq x < 1, x \in \mathbb{R} \\ 1, & x \geq 1 \end{cases}\end{split}\]

Batch Processing

Algorithm Parameters

Bernoulli distribution algorithm has the following parameters in addition to the common parameters specified in Distributions:

Parameter

Default Value

Description

algorithmFPType

float

The floating-point type that the algorithm uses for intermediate computations. Can be float or double.

method

defaultDense

Performance-oriented computation method, the only method supported by the algorithm.

p

Not applicable

Success probability of a trial, required parameter.

Examples

Performance Considerations

To get the best overall performance when using the Bernoulli distribution random number generator, provide the 32-bit signed integer homogeneous numeric table constructed with enabled equal features.

Optimization Notice

Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804